• 1 book
• 2 book chapters
• 46 journal articles
• 94 referred conference papers and workshop proceedings
• 2 patents
• 1 tutorial

Books

[1] Deepraj Soni, Kanad Basu, Mohammed Nabeel, Najwa Aaraj, Marc Manzano and Ramesh Karri. Hardware Architectures for Post-Quantum Digital Signature Schemes. Springer, 2020.

Book Chapters

[2] Kanad Basu. Structural Signal Selection for Post-Silicon Validation, In: Post-Silicon Validation and Debug, Springer, 2018.

[1] Nirmalya Bandyopadhyay, Kanad Basu and Prabhat Mishra. HMDES, ISDL and Other Contemporary ADLs, In: Processor Description Languages: Applications and Methodologies, Morgan Kaufmann Publishers, 2008.

Journal Articles

[46] Navnil Choudhury, Chao Lu, Kanad Basu. Quantum Assertion Scheme for Assuring Qudit Robustness, IEEE Computer Architecture Letters (CAL), 2024.

[45] Shamik Kundu, Sanjay Das, Arnab Raha, Souvikk Kundu, Sayar Karmakar, Yiorgos Makris, Kanad Basu. Bit-by-Bit: Investigating the Vulnerabilities of Binary Neural Networks to Adversarial Bit Flipping, Transactions on Machine Learning Research (TMLR), 2024.

[44] Chao Lu, Christian Pilato, Kanad Basu. QHLS: An HLS Framework to Convert High-Level Descriptions to Quantum Circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024.

[43] Amisha Srivastava, Sanjay Das, Navnil Choudhury, Rafail Psiakis, Pedro Silva, Debjit Pal, Kanad Basu. SCAR: Power Side-Channel Analysis at RTL-Level, IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), 2024.

[42] Samit Miftah, Kshitij Raj, Xingyu Meng, Sandip Ray, Kanad Basu. System-on-Chip Information Flow Validation under Asynchronous Resets, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024.

[41] Chao Lu, Navnil Choudhury, Utsav Banerjee, Abdullah Saki, Kanad Basu. QuBEC: Boosting Equivalence Checking for Quantum Circuits with QEC Embedding, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024.

[40] Udit Kumar, Ayush Arunachalam, Corbin Feit, S. Novia Berriel, Kanad Basu, Parag Banerjee, and Sudipta Seal. Real-Time Artificial Intelligence Enhanced Defect Engineering in CeO2 Nanostructures. AVS Journal of Vacuum Science and Technology A, 2023

[39] Shamik Kundu, Suvadeep Banerjee, Arnab Raha, Fei Su, Suriyaprakash Natarajan, Kanad Basu. DiagNNose: Towards Error Localization in Deep Learning Hardware based on VTA-TVM Stack. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023.

[38] Abhijitt Dhavlle, N Meraj Ahmed, Naseef Mansoor, Kanad Basu, Amlan Ganguly, Sai Manoj PD. Defense against On-Chip Trojans Enabling Traffic Analysis Attacks based on Machine Learning and Data Augmentation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023.

[37] Shamik Kundu, Suvadeep Banerjee, Arnab Raha, Fei Su, Suriyaprakash Natarajan, Kanad Basu. Trouble-shooting at GAN Point: Improving Functional Safety in Deep Learning Accelerators. IEEE Transactions on Computers (TC), 2023.

[36] Rakibul Hassan, Xingyu Meng, Kanad Basu, Sai Manoj PD. Circuit Topology-aware Vaccination-based Hardware Trojan Detection. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023.

[35] Ioannis Zografopoulos, Abraham Peedikayil Kuruvila, Charalambos Konstantinou, Kanad Basu. Time Series-based Detection and Impact Analysis of Firmware Attacks in Microgrids. Elsevier Energy Reports, 2022.

[34] Shakya Chakrabarti, Akshay Wali, Harikrishnan Ravichandran, Shamik Kundu, Thomas Schranghamer, Kanad Basu, Saptarshi Das. Logic Locking of Integrated Circuits Enabled by Nanoscale MoS2 Based Memtransistors. ACS Applied Nano Materials, 2022.

[33] Rajesh Datta, Guangwei Zhao, Kanad Basu, Kaveh Shamsi. A Security Analysis of Circuit Clock Obfuscation. MDPI Cryptography, 2022.

[32] Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan, Kanad Basu. A Novel Low-power Compression Scheme for Systolic Array-based Deep Learning Accelerators. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022.

[31] Seetal Potluri, Shamik Kundu, Kanad Basu, Aydin Aysu. SeqL+: Secure Scan-Obfuscation with Theoretical and Empirical Validation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022.

[30] Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan, Kanad Basu. Analysis and Mitigation of DRAM Faults in Sparse-DNN Accelerators. IEEE Design and Test Journal (D&T), 2022.

[29] Xingyu Meng, Kshitij Raj, Sandip Ray, Kanad Basu. SEVNOC: Security Validation of System-on-Chip Designs with NoC Fabrics. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022.

[28] Debjani SIhi, Biswanath Dari, Abraham Peedikayil Kuruvila, Gaurav Jha, Kanad Basu. Explainable Machine Learning Approach Quantified the Long-term (1981-2015) Impact of Climate and Soil Properties on Yields of Major Agricultural Crops across CONUS. Frontiers in Sustainable Food Systems Journal, 2022.

[27] Abraham Kuruvila, Xingyu Meng, Shamik Kundu, Gaurav Pandey, Kanad Basu. Explainable Machine Learning for Intrusion Detection via Hardware Performance Counters. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022.

[26] Ayush Arunachalam, S. Novia Berriel, Corbin Feit, Udit Kumar, Sudipta Seal, Kanad Basu, Parag Banerjee. A machine learning approach to thickness prediction from in situ spectroscopic ellipsometry data for atomic layer deposition processes. AVS Journal of Vacuum Science and Technology A, 2022.

[25] Udit Kumar, Corbin Feit, S. Novia Berriel, Ayush Arunachalam, Kanad Basu, Parag Banerjee, Sudipta Seal. In situ Ellipsometry aided Rapid ALD Process Development and Parameter Space Visualization of Cerium Oxide Nano-films. AVS Journal of Vacuum Science and Technology A, 2021.

[24] Sanjeev Tannirkulam Chandrasekaran, Abraham Kuruvila, Kanad Basu and Arindam Sanyal. Real-Time Hardware Based Malware and Micro-architectural Attack Detection Utilizing CMOS Reservoir Computing. IEEE Transactions on Circuits and Systems II: Express Briefs (TCASII), 2021.

[23] Abraham Kuruvila, Anushree Mahapatra, Ramesh Karri, Kanad Basu. Hardware Performance Counters: Ready-Made vs Tailor-Made. ACM Journal on Emerging Technologies in Computing Systems (JETC), 2021.

[22] Nimisha Limaye, Nikhil Rangarajan, Satwik Patnaik, Ozgur Sinanoglu, Kanad Basu. PolyWorm: Leveraging Polymorphic Behavior to Implant Hardware Trojans. IEEE Transactions on Emerging Topics in Computing (TETC), 2021.

[21] Abraham Peedikayil Kuruvila, Ioannis Zografopoulos, Kanad Basu, Charalambos Konstantinou. Hardware-Assisted Detection of Firmware Attacks in Inverter-Based Cyberphysical Microgrids. Elsevier International Journal of Electrical Power and Energy Systems (JEPE), 2021.

[20] Wenye Liu, Chip-Hong Chang, Xueyang Wang, Chen Liu, Jason Fung, Mohammad Ebrahimabadi, Naghmeh Karimi, Xingyu Meng, Kanad Basu. Two Sides of the Same Coin: Boons and Banes of Machine Learning in Hardware Security. IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2021.

[19] Xingyu Meng, Shamik Kundu, Arun Kanuparthi, Kanad Basu. RTL-ConTest: Concolic Testing on RTL for Detecting Security Vulnerabilities. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2021.

[18] Akshay Wali, Shamik Kundu, Andrew Arnold, Guangwei Zhao, Kanad Basu, and Saptarshi Das. Satisfiability Attack Resistant Camouflaged Two-Dimensional Heterostructure Devices. ACS Nano, 2021.

[17] Rana Elnaggar, Kanad Basu, Krishnendu Chakrabarty, and Ramesh Karri. Run-time Malware Detection Using Embedded Trace Buffers. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2021.

[16] Shamik Kundu, Suvadeep Banerjee, Arnab Raha, Suriyaprakash Natarajan and Kanad Basu, Towards Functional Safety of Systolic Array-based Deep Learning Hardware Accelerators. IEEE Transactions on VLSI Systems (TVLSI), 2021.

[15] Siddhartha Sankar Rout, Sujay Deub and Kanad Basu, WiND: An Efficient Post-Silicon Debug Strategy for Network-on-Chip. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2021.

[14] Abraham Kuruvila, Shamik Kundu and Kanad Basu, Defending Hardware-based Malware Detectors against Adversarial Attacks. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2021.

[13] Virinchi Roy Surabhi, Prashanth Krishnamurthy, Hussam Amrouch, Kanad Basu, Jorg Henkel, Ramesh Karri and Farshad Khorrami, Hardware Trojan Detection Using Controlled Circuit Aging. IEEE Access, 2020.

[12] Kanad Basu, Suha Hussain, Ujjwal Gupta and Ramesh Karri. COPPTCHA: COPPA Tracking by Checking Hardware-level Activity. IEEE Transactions on Information Forensics and Security (TIFS), 2020.

[11] Binod Kumar, Jay Adhaduk, Kanad Basu, Masahiro Fujita and Virendra Singh. A Methodology to Capture Fine-grained Internal Visibility during Multi-session Silicon Debug. IEEE Transactions on VLSI Systems (TVLSI), 2020.

[10] Kanad Basu, Prashanth Krishnamurthy, Farshad Khorrami and Ramesh Karri. A Theoretical Study of Hardware Performance Counters-based Malware Detection. IEEE Transactions on Information Forensics and Security (TIFS), 2020.

[9] Kanad Basu, Samah Saeed, Christian Pilato, Mohammad Ashraf, Mohammad Nabeel, Krishnendu Chakraborty and Ramesh Karri. CAD-Base: An Attack Vector into the Electronics Supply Chain. Accepted for publication at ACM Transactions on Design Automation of Embedded Systems (TODAES), 2019.

[8] Jeff Zhang, Kanad Basu and Siddharth Garg. Fault-tolerant Systolic Array Based Accelerators for Deep Neural Network Execution. IEEE Design and Test of Computer (DNT), 2019.

[7] Mohammad Shayan, Kanad Basu and Ramesh Karri. Hardware Trojans Inspired IP Watermarks. IEEE Design and Test of Computer (DNT), 2019.

[6] Christian Pilato, Kanad Basu and Ramesh Karri. Black-Hat High-Level Synthesis: Myth or Reality? IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), 2019.

[5] Harshit Kumar, Tahereh Jabberi, Gleb Krylov, Kanad Basu, Eby Friedman, and Ramesh Karri. Toward increasing the difficulty of reverse engineering of RSFQ circuits.  IEEE Transactions on Applied Superconductivity, 2019.

[4] Binod Kumar, Kanad Basu, Masahiro Fujita and Virendra Singh. Post-Silicon Gate-Level Error Localization with Effective & Combined Trace Signal Selection.  IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD), 2018.

[3] Kanad Basu, Chetan Murthy and Prabhat Mishra. Bitmask aware compression of NISC Control Words. Integration, the VLSI Journal (Elsevier), 2013.

[2] Kanad Basu and Prabhat Mishra. RATS: Restoration Aware Trace Signal Selection for Post-silicon Validation. IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), 2013.

[1] Kanad Basu and Prabhat Mishra. Test Data Compression using Efficient Bitmask and Dictionary Selection Methods. IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), 2009.

Prominent Peer-Reviewed Conference and Workshop Proceedings

[94] Samit Miftah, Amisha Srivastava, Hyunmin Kim, Shiyi Wei, Kanad Basu. SymbFuzz: Symbolic Execution Guided Hardware Fuzzing. At IEEE/ACM International Symposium on Microarchitecture (MICRO), 2025.

[93] Navnil Choudhury, Ameya Bhave, Kanad Basu. Task Division of Quantum Circuits using ZX-calculus. At IEEE International Conference on Quantum Computing and Engineering (QCE), 2025.

[92] Swastik Bhattacharya, Mohammad Hossein Gohari Nejad, Sanjay Das, Anand Menon,
Shamik Kundu, Souvik Kundu, Arnab Raha, Kanad Basu. Probing Model Robustness: Evolutionary Bit-Flip Attacks on Transformers vs. State Space Models, At SRC Techcon, 2025.

[91] Aidan O'Gara, Gabriel Kulp, Will Hodgkins, James Petrie, Vincent Immler, Aydin Aysu, Kanad Basu, Shivam Bhasin, Stjepan Picek, Ankur Srivastava. Hardware-Enabled Mechanisms for Verifying Responsible AI Development, At ICML Technical AI Governance Workshop, 2025.

[90] Sanjay Das, Shamik Kundu, Sumit Mondal, Kanad Basu. CONCEAL: Covert NoC Exploitation in In-Memory Computing-based DNN Accelerators, At IEEE International Conference on Omni-layer Intelligent systems (COINS), 2025.

[89] Anand Menon, Samit Miftaha, Amisha Srivastava, Shamik Kundu, Souvik Kundu, Arnab Raha, Suvadeep Banerjee, Deepak Mathaikutty, Kanad Basu. OpenAssert: Towards Secure Assertion Generation using Large Language Models, At VLSI Test Symposium (VTS), 2025.

[88] Muhammad Usama Zubair, Kanad Basu, Waseem Abbas. Verification of Neural Network Robustness Against Weight Perturbations Using Star Sets, At IEEE Conference on Artificial Intelligence (CAI), 2025.

[87] Sanjay Das, Swastik Bhattacharya, Anand Menon, Shamik Kundu, Pooja Madhusoodhanan, Prasanth Viswanathan Pillai, Rubin Parekhji, Arnab Raha, Suvadeep Banerjee, Suriya Natarajan, Kanad Basu. Machine Learning-Driven STL Generation for Enhancing Functional Safety of E/E Systems, At ACM/IEEE Design Automation Conference (DAC), 2025.

[86] Navnil Choudhury, Ameya Shirish Bhave, Kanad Basu. ZXNet: ZX Calculus-Driven Graph Neural Network Framework for Quantum Circuit Equivalence Checking, At ACM/IEEE Design Automation Conference (DAC), 2025.

[85] Samit Shahnawaz Miftah, Hyunmin Kim, Kanad Basu. InterConFuzz: A Fuzzing-based Comprehensive NoC Verification Framework, At ACM/IEEE Design Automation Conference (DAC), 2025.

[84] Sakib Reza, Sanjay Das, Shamik Kundu, Kanad Basu, Ifana Mahbub. Efficient Explainable Boosting Machine for RF Active Metasurface Array Synthesis, At IEEE Radio and Wireless Symposium (RWS), 2025.

[83] Amurt Prakash, Abhijeet Singh, Pooja Madhusoodhanan, Padma Arvind, Prasanth Viswanathan Pillai, Sanjay Das, Kanad Basu. Advancing Functional Safety: Improving Failure Mode Analysis and Fault Injection Using Automation and GNN Algorithms, At International Conference on VLSI Design (VLSID), 2025.

[82] Sanjay Das, Kanad Basu. Selective Radiation Hardening for Edge AI Systems: Identifying and Protecting Critical Bits, At GoMacTech 2025.

[81] Navnil Choudhury, Kanad Basu. Scalable Error Detection and Verification for Enhanced Quantum Computing, At GoMacTech 2025.

[80] Amisha Srivastava, Kanad Basu. Securing Cryptographic Hardware: Detecting and Mitigating Power Side-Channel Attacks, At GoMacTech 2025.

[79] Anand Menon, Kanad Basu. AssertGen: Towards Secure Assertion Generation using Large Language Model, At GoMacTech 2025.

[78] Navnil Choudhury, Chaithanya Naik Mude, Sanjay Das, Preetham Chandra Tikkireddi, Swamit Tannu, Kanad Basu. Crosstalk-induced Side Channel Threats in Multi-Tenant NISQ Computers, At Network and Distributed System Security Symposium (NDSS), 2025.

[77] Shamik Kundu,Ifana Mahbub,Kanad Basu,Sanjay Das,Sakib Reza. Efficient Explainable Boosting Machine for RF Active Metasurface Array Synthesis, IEEE Radio Wireless Week (RWW), 2025.

[76] Chao Lu, Navnil Choudhury, Kanad Basu. QuaSi: A Scalable and Reliable Quantum Simulation-based Equivalence Checking Framework, IEEE International Conference on Quantum Computing and Engineering (QCE), 2024.

[75] Zhepeng Wang, Yi Sheng, Niranjan Koirala, Kanad Basu, Taeho Jung, Cheng-Chang Lu, Weiwen Jiang. PristiQ: A Co-Design Framework for Preserving Data Security of Quantum Learning in the Cloud. At IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2024.

[74] Sakib Reza, Sanjay Das, Shamik Kundu, Kanad Basu, Ifana Mahbub. Machine Learning Intervened RIS-based RF Interference Management For IoT. At IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2024.

[73] Navnil Choudhury, Kanad Basu. A Survey of Side-Channel Attacks in Superconducting Quantum Computers. At IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2024.

[72] Samit Miftah, Amisha Srivastava, Hynmin Kim, Kanad Basu. Assert-O: Context-based Assertion Optimization using LLMs. At ACM Great Lakes Symposium on VLSI (GLSVLSI), 2024.

[71] Sanjay Das, Shamik Kundu, Kanad Basu. Explainability to the Rescue: A Pattern-Based Approach for Detecting Adversarial Attacks. At IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2024.

[70] Shamik Kundu, Mirazul Haque, Sanjay Das, Wei Yang, Kanad Basu. MENDNet: Just-in-time Fault Detection and Mitigation in AI Systems with Uncertainty Quantification and Multi-Exit Networks, At ACM/IEEE Design Automation Conference (DAC), 2024.

[69] Sanjay Das, Shamik Kundu, Pooja Madhusoodhanan, Prasanth Viswanathan Pillai, Rubin Parekhji, Arnab Raha, Suvadeep Banerjee, Suriya Natarajan, Kanad Basu. Graph Learning-based Fault Criticality Analysis for Enhancing Functional Safety of E/E Systems, AT ACM/IEEE Design Automation Conference (DAC), 2024.

[68] Xingyu Meng, Amisha Srivastava, Ayush Arunachalam, Avik Ray, Pedro Henrique Silva, Rafail Psiakis, Yiorgos Makris, Kanad Basu. NSPG: Natural language Processing-based Security Property Generator for Hardware Security Assurance, AT ACM/IEEE Design Automation Conference (DAC), 2024.

[67] Shamik Kundu, Navnil Choudhury, Kanad Basu. QuEST: Quantum Circuit Output Estimation using Gaussian Distribution Analysis, At IEEE Symposium on Quality of Electronic Design (ISQED), 2024.

[68] Shamik Kundu, Arnab Raha, Deepak A. Mathaikutty, Kanad Basu. RASH: Reliable Deep Learning Acceleration using Sparsity-based Hardware, At IEEE Symposium on Quality of Electronic Design (ISQED), 2024.

[69] Xingyu Meng, Abhrajit Sengupta, Kanad Basu. A Needle in the Haystack: Inspecting Circuit Layout to Identify Hardware Trojans, At IEEE Symposium on Quality of Electronic Design (ISQED), 2024.

[66] Sanjay Das, Shamik Kundu, Anand Menon, Yihui Ren, Shubha Kharel and Kanad Basu. Analyzing and Mitigating Circuit Aging Effects in Deep Learning Accelerators. At IEEE VLSI Test Symposium (VTS), 2024.

[65] Samit Miftah, Shamik Kundu, Austin Mordahl, Shiyi Wei and Kanad Basu. RTL-Spec: RTL Spectrum Analysis for Security Bug Localization. At IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2024.

[64] Shamik Kundu, Navnil Choudhury, Sanjay Das, Arnab Raha, Kanad Basu. QNAD: Quantum Noise Injection for Adversarial Defense in Deep Neural Networks. At IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2024.

[63] Amisha Srivastava, Sneha Thakur, Abraham Peedikayil Kuruvila, Poras T. Balsara, Kanad Basu. Hardware-based Detection of Malicious Firmware Modification in Microgrids. At International Conference on VLSI Design (VLSID), 2024.

[62] Ayush Arunachalam, Sanjay Das, Monikka Rajan, Fei Su, Xiankun Jin, Suvadeep Banerjee, Arnab Raha, Suriyaprakash Natarajan, Kanad Basu. Enhanced ML-based Approach for Functional Safety Improvement in Automotive AMS Circuits. At International Test Conference (ITC), 2023.

[61] Ayush Arunachalam, Kanad Basu. Feature- and Signal Selection-aware FuSa Violation Detection in Automotive AMS Circuits. At TECHCON 2023.

[60] Shamik Kundu, Kanad Basu. Improving Fault Injection-based Functional Safety Evaluation using Machine Learning. At TECHCON 2023.

[59] Sanjay Das, Shamik Kundu, Kanad Basu. Bottlenecks in Secure Adoption of Deep Neural Networks in Safety-Critical Applications. At IEEE Midwest Symposium on Circuits and Systems (MWSCAS), 2023.

[58] Anand Menon, Amisha Srivastava, Shamik Kundu, Kanad Basu. Application Profiling Using Register-Instruction Hardware Performance Counters. At IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2023.

[57] Amisha Srivastava, Chao Lu, Navnil Choudhury, Ayush Arunachalam, Kanad Basu. Search Space Reduction for Efficient Quantum Compilation. At ACM Great Lakes Symposium on VLSI (GLSVLSI), 2023.

[56] Chao Lu, Christian Pilato, Kanad Basu. Towards High-Level Synthesis of Quantum Circuits. At Design, Automation and Test in Europe Conference (DATE), 2023.

[55] Chao Lu, Amisha Srivastava, Kanad Basu. Designing Complex Mathematical Functions using Quantum Hardware. At GoMacTech 2023.

[54] Xingyu Meng, Kanad Basu. Scalable Semi-formal SoC Security Validation. At GoMacTech 2023.

[53] Shamik Kundu, Kanad Basu. Towards Radiation-aware Functional Safety in Online AI Accelerators. At GoMacTech 2023.

[52] Ayush Arunachalam, Kanad Basu. Detecting Radiation-aware Functional Safety Violation via Early Anomaly Detection. At GoMacTech 2023.

[51] Chao Lu, Utsav Banerjee, Kanad Basu. Design and Analysis of a Scalable and Efficient Quantum Circuit for LWE Matrix Arithmetic. IEEE International Conference on Computer Design (ICCD), 2022.

[50] Shamik Kundu, Kanad Basu. Detecting Functional Safety Violation in Online AI Accelerators. At IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS), 2022.

[49] Ayush Arunachalam, Shamik Kundu, Fei Su, Suvadeep Banerjee, Robert Jin, Arnab Raha, Suriyaprakash Natarajan, Kanad Basu. Unsupervised Learning-based Early Anomaly Detection in AMS Circuits of Automotive SoCs. At International Test Conference (ITC), 2022.

[48] Shamik Kundu, Akul Malhotra, Arnab Raha, Sumeet Gupta, Kanad Basu. RIBoNN: Designing Robust In-Memory Binary Neural Network Accelerators. At International Test Conference (ITC), 2022.

[47] Chao Lu, Shamik Kundu, Abraham Peedikayil Kuruvila, Supriya Margabandhu Ravichandran, Kanad Basu. Design and Logic Synthesis of a Scalable, Efficient Quantum Number Theoretic Transform. At ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2022.

[46] Ayush Arunachalam, Shamik Kundu, Fei Su, Suvadeep Banerjee, Robert Jin, Arnab Raha, Suriyaprakash Natarajan, Kanad Basu. A Novel Unsupervised Learning Framework for Early Anomaly Detection of AMS Circuits in Automotive SoCs. At TECHCON 2022.

[45] Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Kanad Basu. Fault Resilience of DNN Accelerators for Compressed Sensor Inputs. At ISVLSI 2022.

[44] Chao Lu, Ayush Arunachalam, Shamik Kundu, Kanad Basu. Survey on Quantum Noise-Aware Machine Learning. At Dallas CAS 2022.

[43] X. Meng, M. Hassan, K. Basu, T. Hoque. A Semi-formal Information Flow Validation for Analyzing Secret Asset Propagation in COTS IC Integrated Systems. At Great Lakes Symposium on VLSI (GLSVLSI), 2022.

[42] S. Kundu, S. Banerjee, A. Raha, Kanad Basu. Special Session: Effective In-field Testing of Deep Neural Network Hardware Accelerators. At VLSI Test Symposium (VTS), 2022.

[41] Ayush Arunachalam, S. Novia Berriel, Parag Banerjee, Kanad Basu. Machine Learning-enhanced Efficient Spectroscopic Ellipsometry Modeling. At AAAI Workshop on AI to Accelerate Science and Engineering (AI2ASE), 2022.

[40] Purab Ranjan Sutradhar, Kanad Basu, Sai Manoj Pudukotai Dinakarrao, Amlan Ganguly. An Ultra-efficient Look-up Table based Programmable Processing in Memory Architecture for Data Encryption. At IEEE International Conference on Computer Design (ICCD), 2022.

[39] Sudipta Seal, Udit Kumar, Corbin Feit, S. Novia Berriel, Ayush Arunachalam, Kanad Basu, Parag Banerjee. ALD deposited functional hetero-nano structured ceria films. At TMS Annual Meeting & Exhibition, 2022.

[38] Abraham Kuruvila, Sayar Karmakar and Kanad Basu. Time Series-based Malware Detection using Hardware Performance Counters. At IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2021.

[37] Shamik Kundu, Kanad Basu, Mehdi Sadi, Twisha Titirsha, Shihao Song, Anup Das, Ujjwal Guin. Special Session: Reliability Analysis for ML/AI Hardware. At IEEE VLSI Test Symposium (VTS), 2021.

[36] Xingyu Meng, Kshitij Raj, Atul Prasad Deb Nath, Kanad Basu and Sandip Ray. SoCCAR: Detecting SoC Security Violations Under Asynchronous Resets. At ACM/IEEE Design Automation Conference (DAC), 2021.

[35] Naimul Hassan, Alexander J. Edwards, Dhritiman Bhattacharya, Mustafa Munawar Shihab, Varun Venkat, Peng Zhou, Xuan Hu, Shamik Kundu, Abraham Peedikayil Kuruvila, Kanad Basu, Jayasimha Atulasimha, Yiorgos Makris and Joseph S. Friedman. Secure Logic Locking with Strain-Protected Nanomagnet Logic. At ACM/IEEE Design Automation Conference (DAC), 2021.

[34] M Meraj Ahmed, Abhijitt Dhavlle, Naseef Mansoor, Purab Sutradhar, Sai Manoj P D, Kanad Basu and Amlan Ganguly. What Can a Remote Access Hardware Trojan do to a Network-on-Chip? At IEEE International Symposium on Circuits and Systems (ISCAS), 2021.

[33] Xingyu Meng, Rakibul Hassan, Sai Manoj PD and Kanad Basu. Can Overclocking Detect Hardware Trojans? At IEEE International Symposium on Circuits and Systems (ISCAS), 2021.

[32] Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Suriya Natarajan and Kanad Basu. HardCompress: A Novel Hardware-based Low Power Compression Scheme for DNN Accelerators. At International Symposium on Quality Electronic Design (ISQED), 2021.

[31] Ayesha Siddique, Kanad Basu and Khaza Anuarul Hoque. Exploring Fault-Energy Trade-offs in Approximate DNN Hardware Accelerators. At International Symposium on Quality Electronic Design (ISQED), 2021.

[30] Shamik Kundu, Xingyu Meng and Kanad Basu. Application of Machine Learning in Hardware Trojan Detection. At International Symposium on Quality Electronic Design (ISQED), 2021.

[29] Pandy Kalimathy, Kanad Basu and Benjamin Carrion Schaefer. Efficient Hierarchical Post-Silicon Validation and Debug. At International Conference on VLSI Design (VLSID), 2021.

[28] Yug Pratap Singh, Abraham Kuruvila and Kanad Basu. Hardware-assisted Detection of Malware in Automotive-Based Systems. At Design, Automation and Test in Europe Conference (DATE), 2021.

[27] Abraham Kuruvila, Ayush Arunachalam and Kanad Basu. Benefits and Challenges of Utilizing Hardware Performance Counters for COPPA Violation Detection. At IEEE International Conference on PHYSICAL ASSURANCE and INSPECTION of ELECTRONICS (PAINE), 2020.

[26] M Meraj Ahmed, Abhijitt Dhavlle, Naseef Mansoor, Purab Sutradhar, Sai Manoj Pudukotai Dinakarrao, Kanad Basu and Amlan Ganguly. Defense against On-Chip Trojans Enabling Traffic Analysis Attacks. At ACM Asian Hardware Oriented Security and Trust Symposium (AsianHOST), 2020.

[25] Shohidul Islam, Abraham Kuruvila, Kanad Basu and Khaled Khasawneh. ND-HMDs: Non-Differentiable Hardware Malware Detectors against Evasive Transient Execution Attacks. At IEEE International Conference on Computer Design (ICCD), 2020.

[24] Shamik Kundu, Ahmet SoyyiÄŸit, Khaza Hoque and Kanad Basu. High-level Modeling of Manufacturing Faults in Deep Neural Network Accelerators. At IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS), 2020.

[23] Abraham Kuruvila, Shamik Kundu, and Kanad Basu. Analyzing the Efficiency of Machine Learning Classifiers in Hardware-based Malware Detectors. At IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2020.

[22] Jiafeng Xie, Kanad Basu, Kris Gaj and Ujjwal Guin. Special Session: The Recent Advance in Hardware Implementation of Post-Quantum Cryptography. At VLSI Test Symposium (VTS), 2020.

[21] Aditya Rohan, Kanad Basu, and Ramesh Karri. Can Monitoring System State + Instruction Sequences aid Malware Detection? At IEEE Asian Test Symposium (ATS), 2019.

[20] Deepraj Soni, Kanad Basu, Mohammed Nabeel, and Ramesh Karri. A Hardware Evaluation Study of NIST Post-Quantum Cryptographic Signature schemes. At NIST PQC Standardization Conference, 2019.

[19] Kanad Basu, Rana Elnaggar, Krishnendu Chakrabarty, and Ramesh Karri. Preempt: PReempting malware by Examining Embedded Processor Traces. At ACM/IEEE Design Automation Conference (DAC), 2019.

[18] Chistian Pilato, Kanad Basu, Mohammed Shayan, Francesco Regazzoni and Ramesh Karri. High-Level Synthesis of Benevolent Hardware Trojans for IP Watermarking. At Design, Automation and Test in Europe Conference (DATE), 2019.

[17] Sidhartha Sankar Rout, Kanad Basu and Sujay Deb. Efficient Post-Silicon Validation of Network-on-Chip using Wireless Links. IEEE International Conference on VLSI Design (VLSID), 2019.

[16] Jeff Zhang, Tianyu Gu, Kanad Basu and Siddharth Garg. Analyzing and mitigating the impact of permanent faults on a systolic array based neural network accelerator. IEEE VLSI Test Symposium (VTS), 2018.

[15] Binod Kumar, Kanad Basu and Virendra Singh. A Technique for Electrical Error Localization with Learning Methods During Post-silicon Debugging. IEEE International Conference on Green and Sustainable Computing (IGSCC), 2018.

[14] Sourav Das, Kanad Basu, Janardhan Rao Doppa, Partha Pratim Pande, Ramesh Karri, Krishnendu Chakrabarty. Abetting Planned Obsolescence by Aging 3D Networks-on-Chip. IEEE International Symposium on Network on Chips (NOCS), 2018.

[13] Ankit Jindal, Binod Kumar, Kanad Basu, and Masahiro Fujita. ELURA: A Methodology for Post-silicon Gate-level Error Localization using Regression Analysis. IEEE International Conference on VLSI Design (VLSID), 2018.

[12] Binod Kumar, Kanad Basu, Masahiro Fujita and Virendra Singh. RTL Level Trace Signal Selection and Coverage Estimation During Post-Silicon Validation. IEEE International High Level Design Validation and Test Workshop (HLDVT), 2017.

[11] Binod Kumar, Kanad Basu, Ankit Jindal, Masahiro Fujita, and Virendra Singh. Improving post-silicon error detection with topological selection of trace signals. IEEE/IFIP International Conference on on Very Large Scale Integration (VLSI-SoC), 2017.

[10] Kanad Basu, Rishi Kumar, Santosh Kulkarni and Rohit Kapoor. Deterministic Shift Power Reduction in Test Compression. IEEE International Symopsium on VLSI Design and Test (VDAT), 2017.

[9] Binod Kumar, Kanad Basu, Ankit Jindal, Brajesh Pandey and Masahiro Fujita. A Formal Perspective on Effective Post-Silicon Debug and Trace Signal Selection. IEEE International Symopsium on VLSI Design and Test (VDAT), 2017.

[8] Subhadip Kundu, Kanad Basu and Rohit Kapur. Observation-Point identification based on Signal Selection Methods for improving Diagnostic Resolution. International Test Conference – India (ITC-India), 2017.

[7] Kanad Basu, Prabhat Mishra, Priyadarsan Patra, Amir Nahir, Allon Adir. Dynamic Selection of Trace Signals for Post-Silicon Debug. International Workshop on Microprocessor Test and Verification (MTV), 2013.

[6] Kanad Basu, Prabhat Mishra and Priyadarsan Patra. Observability-aware Directed Test Generation for Soft Errors and Crosstalk Faults. IEEE International Conference on VLSI Design (VLSID), 2013.

[5] Kanad Basu, Prabhat Mishra and Priyadarsan Patra. Constrained Signal Selection for Post Silicon Validation. IEEE International High Level Design, Validation and Test Workshop (HLDVT), 2012.

[4] Kanad Basu, Prabhat Mishra and Priyadarsan Patra. Efficient Combination of Trace and Scan Signals for Post-Silicon Validation and Debug. IEEE International Test Conference (ITC), 2011.

[3] Kanad Basu and Prabhat Mishra. Efficient Trace Data Compression using Statically Selected Dictionary. IEEE VLSI Test Symposium (VTS), 2011.

[2] Kanad Basu and Prabhat Mishra. Efficient Trace Signal Selection for Post Silicon Validation and Debug. International Conference on VLSI Design (VLSID), 2011 (Best Paper Award).

[1] Kanad Basu and Prabhat Mishra. A Novel Test-Data Compression Technique using Application-Aware Bitmask and Dictionary Selection Methods. ACM Great Lakes Symposium on VLSI (GLSVLSI), 2008.

Patents

[2] Kanad Basu, Raghu Gaurav Gopalakrishnasetty and Hari Krishnan Rajeev. Automatic test pattern generation (ATPG) considering crosstalk effects. US9218447B2

[1] Prabhat Mishra, Seok-won Seong, Kanad Basu, Weixun Wang, Xiaoke Qin. Bitmaksk-based Code Compression Technique and Decompression Mechanism. Provisional Patent UF 12654, 2007.